TSC Kernel Clock Running Slow on Xeon D-1528

Description

Kernel clock on FreeNAS 11.3-U2 on Xeon D-1528 SuperMicro SM-X10SDV-6C+-TLN4F runs about 3 times slower than it should when using TSC-low. Setting kern.timecounter.hardware=HPET tunable fixes the issue.

I have also reported it on FreeBSD Bugzilla: https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=245597

I wonder if this is related to others reporting TSC-low problems:

https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=244705
https://forums.freebsd.org/threads/freebsd-clock-drift.71277/
https://forums.freebsd.org/threads/tsc-low-as-timecounter-slows-system-clock-by-a-factor-of-4.68619/

Problem/Justification

None

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Katalon Manual Tests (BETA)

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Rafal Lukawiecki June 13, 2020 at 3:25 PM

I have just updated the BIOS to the newest version, 2.1, only a few months old. Unfortunately, that did not resolve the issue. On the other hand, the workaround of setting `kern.timecounter.hardware=HPET` has been working well.

Alexander Motin June 4, 2020 at 6:02 PM

Closing on lack of new input.

Alexander Motin April 27, 2020 at 2:54 PM

As I have guessed, your TSC frequency was miscalibrated twice higher than it should be:

The TSC calibration is done based on legacy i8254 timer – the only available on that early boot stage, so either it is not functioning properly there, or something goes wrong during the calibration process.

On Supermicro site I see newer BIOS version, so I would propose you to upgrade in case it is some board issue.

Also I would propose you to try boot there TrueNAS 12 nightly image to see whether issue remain the same there.  Also there was a recent commit to FreeBSD to try detect the miscalibrations by comparing obtained value with one reported in CPUID, but it seems your CPU does not report those 0x15 or 0x16 CPUID leafs, being 5+ years old.

You may also set machdep.disable_tsc_calibration loader tunable to 1 to avoid calibration and use value 1.9GHz from the CPU model string, but that may have pretty low precision ~1%.

Rafal Lukawiecki April 26, 2020 at 9:20 AM

Thank you, Alexander. I attach a zip with the data you have requested. I trust it helps to debug the reason TSC is running so slow.

Alexander Motin April 18, 2020 at 2:11 PM
Edited

Rafal, Jira attachments marked as private are available only to iXsystems developers, and we do not care about your jail or share configs, seeing dozens of those every day (and trust me I saw many weird and vulgar names ).  But requesting single easy to obtain piece of data is easier and less time-consuming then asking dozen specific questions.  It may happen (and often does) that I spend my time investigating this problem to ask you specific information, and after that reported just disappear.  Please, respect our time when asking for free support.

TSC timer unlike HPET is either software calibrated or obtains frequency information from unreliable sources, that may cause issues in some cases.  Please provide at least: verbose `dmesg` output, `sysctl -a` output, `cpuid` output, `dmidecode` output, and still standard debug would be good just in case.  And all that without the HPET workaround please.

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Katalon Platform

Created April 13, 2020 at 1:42 PM
Updated July 1, 2022 at 4:49 PM
Resolved June 4, 2020 at 6:02 PM